Files
hsb/S - Software/0 - HSB MRTS Kathode-MCP/3 - Implementation/0 - Code/HAL/inc/CachedStorage.h
mmi 17207a3a4b Fixed some major issues with RAM shortage. Also moved the cached storage to a MALLOC design instead of fixed memory usage. Using freertos porteds malloc and free required to move to HEAP4 to make sure memory does not get fragmented.
Resized nearly all task stacks

Also: 
- Menu fixes for insertion. Almost done, just need to fix the negative voltage insertion for mcp and cathode
- Added Device parameters, must be filled in

git-svn-id: https://svn.vbchaos.nl/svn/hsb/trunk@271 05563f52-14a8-4384-a975-3d1654cca0fa
2017-11-07 15:50:25 +00:00

105 lines
2.9 KiB
C

// -----------------------------------------------------------------------------
/// @file CachedStorage.h
/// @brief EEPROM driver including local caching (for one page)
// -----------------------------------------------------------------------------
// Micro-Key bv
// Industrieweg 28, 9804 TG Noordhorn
// Postbus 92, 9800 AB Zuidhorn
// The Netherlands
// Tel: +31 594 503020
// Fax: +31 594 505825
// Email: support@microkey.nl
// Web: www.microkey.nl
// -----------------------------------------------------------------------------
/// $Revision$
/// $Author$
/// $Date$
// (c) 2017 Micro-Key bv
// -----------------------------------------------------------------------------
/// @defgroup {group_name} {group_description}
/// Description
/// @file adc.h
/// @ingroup {group_name}
#ifndef _CACHEDEEPROM_H_
#define _CACHEDEEPROM_H_
// -----------------------------------------------------------------------------
// Include files
// -----------------------------------------------------------------------------
#include <stdint.h>
#include <stdbool.h>
#include <stdio.h>
#include "stm32f10x.h"
#include "platform.h"
// -----------------------------------------------------------------------------
// Constant and macro definitions
// -----------------------------------------------------------------------------
// -----------------------------------------------------------------------------
// Type definitions.
// -----------------------------------------------------------------------------
struct CachedStorage
{
bool initialized;
unsigned int pageNumber;
size_t cacheSize;
bool dirty;
struct MemoryDevice* memoryDevice;
uint32_t* storage;
uint32_t* tempBuffer;
};
// -----------------------------------------------------------------------------
// Function declarations
// -----------------------------------------------------------------------------
/**
* Initializes the EEPROM hardware and reads the flash page
*/
ErrorStatus CachedStorage_construct(struct CachedStorage* self, struct MemoryDevice* memoryDevice, unsigned int pageNumber, size_t cacheSize);
/**
* Terminates the EEPROM hardware. SPI port is available again
*/
void CachedStorage_destruct(struct CachedStorage* self);
/**
* Writes four bytes to the storage buffer
*/
void CachedStorage_writeWord(struct CachedStorage* self, int offset, uint32_t value);
/**
* Writes binary data to the storage buffer
*/
void CachedStorage_writeBlob(struct CachedStorage* self, int offset, const void* blob, size_t blobSize);
/**
* Reads four bytes from the storage buffer
*/
uint32_t CachedStorage_readWord(struct CachedStorage* self, int offset);
/**
* Reads binary data from the storage buffer
*/
const void* CachedStorage_readBlob(struct CachedStorage* self, int offset);
/**
* Writes the storage buffer to EEPROM (only if the contents differ)
*/
void CachedStorage_commit(struct CachedStorage* self);
#endif