Added all required GPIOs
git-svn-id: https://svn.vbchaos.nl/svn/hsb/trunk@242 05563f52-14a8-4384-a975-3d1654cca0fa
This commit is contained in:
mmi
@@ -65,72 +65,64 @@ ErrorStatus Uart_construct(struct Uart* self, struct UartParameters* parameters)
|
||||
{
|
||||
ErrorStatus returnValue = SUCCESS;
|
||||
|
||||
IODevice_construct(&self->device, read, write);
|
||||
|
||||
//! Create semaphore to synchronize with USART interrupt handler
|
||||
vSemaphoreCreateBinary(self->txSemaphore);
|
||||
|
||||
USART_DeInit(self->USART_TypeDef);
|
||||
|
||||
// self->USART_ClockInitStruct->USART_Clock = USART_Clock_Enable;
|
||||
// self->USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge;
|
||||
// self->USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low;
|
||||
// self->USART_ClockInitStruct->USART_LastBit = USART_LastBit_Enable;
|
||||
//
|
||||
// //! Enable USART clock
|
||||
// USART_ClockInit(self->USART_TypeDef, self->USART_ClockInitStruct);
|
||||
|
||||
// Initialise the UART
|
||||
self->USART_InitStruct.USART_BaudRate = parameters->baudrate;
|
||||
self->USART_InitStruct.USART_WordLength = parameters->wordlength;
|
||||
self->USART_InitStruct.USART_StopBits = parameters->stopbits;
|
||||
self->USART_InitStruct.USART_Parity = parameters->parity;
|
||||
self->USART_InitStruct.USART_Mode = parameters->mode;
|
||||
self->USART_InitStruct.USART_HardwareFlowControl = parameters->hwFlowControl;
|
||||
|
||||
USART_Init(self->USART_TypeDef, &self->USART_InitStruct);
|
||||
|
||||
//! Enable USART interface
|
||||
USART_Cmd(self->USART_TypeDef, ENABLE);
|
||||
|
||||
//! Create a new FREERTOS queue to handle data from app to USART output
|
||||
self->txQueue = xQueueCreate(parameters->txQueueSize, sizeof(struct usartQueueItem));
|
||||
//! Create a new FREERTOS queue to handle data from USART input to app
|
||||
self->rxQueue = xQueueCreate(parameters->rxQueueSize, sizeof(struct usartQueueItem));
|
||||
//! Queue identifier must not be 0 (0 means that the queue is not available)
|
||||
if (self->txQueue == 0)
|
||||
if(!self->initialized)
|
||||
{
|
||||
//! Queue identifier is 0 -> error
|
||||
returnValue = ERROR; //! Set error flag
|
||||
IODevice_construct(&self->device, read, write);
|
||||
|
||||
//! Create semaphore to synchronize with USART interrupt handler
|
||||
vSemaphoreCreateBinary(self->txSemaphore);
|
||||
|
||||
USART_DeInit(self->USART_TypeDef);
|
||||
|
||||
// Initialise the UART
|
||||
self->USART_InitStruct.USART_BaudRate = parameters->baudrate;
|
||||
self->USART_InitStruct.USART_WordLength = parameters->wordlength;
|
||||
self->USART_InitStruct.USART_StopBits = parameters->stopbits;
|
||||
self->USART_InitStruct.USART_Parity = parameters->parity;
|
||||
self->USART_InitStruct.USART_Mode = parameters->mode;
|
||||
self->USART_InitStruct.USART_HardwareFlowControl = parameters->hwFlowControl;
|
||||
|
||||
USART_Init(self->USART_TypeDef, &self->USART_InitStruct);
|
||||
|
||||
//! Enable USART interface
|
||||
USART_Cmd(self->USART_TypeDef, ENABLE);
|
||||
|
||||
//! Create a new FREERTOS queue to handle data from app to USART output
|
||||
self->txQueue = xQueueCreate(parameters->txQueueSize, sizeof(struct usartQueueItem));
|
||||
//! Create a new FREERTOS queue to handle data from USART input to app
|
||||
self->rxQueue = xQueueCreate(parameters->rxQueueSize, sizeof(struct usartQueueItem));
|
||||
//! Queue identifier must not be 0 (0 means that the queue is not available)
|
||||
if (self->txQueue == 0)
|
||||
{
|
||||
//! Queue identifier is 0 -> error
|
||||
returnValue = ERROR; //! Set error flag
|
||||
}
|
||||
if (self->rxQueue == 0)
|
||||
{
|
||||
//! Queue identifier is 0 -> error
|
||||
returnValue = ERROR; //! Set error flag
|
||||
}
|
||||
//! Queue identifier is not 0 -> queue is available
|
||||
|
||||
//! take txSemaphore
|
||||
if (xSemaphoreTake(self->txSemaphore, 0) == pdFALSE)
|
||||
{
|
||||
//! An error has occurred
|
||||
returnValue = ERROR;
|
||||
}
|
||||
|
||||
if (returnValue == SUCCESS)
|
||||
{
|
||||
//! Enable the UART RX not empty interrupt
|
||||
USART_ITConfig(self->USART_TypeDef, USART_IT_RXNE, ENABLE);
|
||||
self->initialized = true;
|
||||
}
|
||||
}
|
||||
if (self->rxQueue == 0)
|
||||
else
|
||||
{
|
||||
//! Queue identifier is 0 -> error
|
||||
returnValue = ERROR; //! Set error flag
|
||||
}
|
||||
//! Queue identifier is not 0 -> queue is available
|
||||
|
||||
//! take txSemaphore
|
||||
if (xSemaphoreTake(self->txSemaphore, 0) == pdFALSE)
|
||||
{
|
||||
//! An error has occurred
|
||||
returnValue = ERROR;
|
||||
}
|
||||
|
||||
struct usartQueueItem tmp;
|
||||
tmp.byte = 0x01;
|
||||
xQueueSend(self->rxQueue, &tmp, 0);
|
||||
tmp.byte++;
|
||||
xQueueSend(self->rxQueue, &tmp, 0);
|
||||
tmp.byte++;
|
||||
xQueueSend(self->rxQueue, &tmp, 0);
|
||||
|
||||
if (returnValue == SUCCESS)
|
||||
{
|
||||
//! Enable the UART RX not empty interrupt
|
||||
USART_ITConfig(self->USART_TypeDef, USART_IT_RXNE, ENABLE);
|
||||
}
|
||||
|
||||
return returnValue;
|
||||
}
|
||||
|
||||
@@ -169,52 +161,60 @@ ErrorStatus Uart_write(struct Uart* self, const char* buffer, int length)
|
||||
ErrorStatus returnValue = SUCCESS; //! Define return variable
|
||||
int txCounter; //! Define a loop counter var
|
||||
|
||||
//! Copy the incoming data into UART data structure
|
||||
for (txCounter = 0; txCounter < length; txCounter++)
|
||||
{
|
||||
usartTxItem.byte = buffer[txCounter]; //! Copy current data in struct
|
||||
if (uxQueueSpacesAvailable(self->txQueue) == 2)
|
||||
if (self->initialized)
|
||||
{
|
||||
|
||||
//! Copy the incoming data into UART data structure
|
||||
for (txCounter = 0; txCounter < length; txCounter++)
|
||||
{
|
||||
USART_ITConfig(self->USART_TypeDef, USART_IT_TXE, ENABLE);
|
||||
usartTxItem.byte = buffer[txCounter]; //! Copy current data in struct
|
||||
if (uxQueueSpacesAvailable(self->txQueue) == 2)
|
||||
{
|
||||
USART_ITConfig(self->USART_TypeDef, USART_IT_TXE, ENABLE);
|
||||
}
|
||||
//! Add the current set of data to UART transmission queue
|
||||
if (pdTRUE != xQueueSend(self->txQueue, &usartTxItem, portMAX_DELAY))
|
||||
{
|
||||
//! Adding item was NOT successful - break out of loop
|
||||
returnValue = ERROR; //! Set return value to FALSE
|
||||
break;
|
||||
}
|
||||
}
|
||||
//! Add the current set of data to UART transmission queue
|
||||
if (pdTRUE != xQueueSend(self->txQueue, &usartTxItem, portMAX_DELAY))
|
||||
{
|
||||
//! Adding item was NOT successful - break out of loop
|
||||
returnValue = ERROR; //! Set return value to FALSE
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (returnValue == SUCCESS)
|
||||
{
|
||||
//! Semaphore has been taken
|
||||
//! Enable the USARTx TXE (transmission empty) interrupt
|
||||
USART_ITConfig(self->USART_TypeDef, USART_IT_TXE, ENABLE);
|
||||
if (returnValue == SUCCESS)
|
||||
{
|
||||
//! Semaphore has been taken
|
||||
//! Enable the USARTx TXE (transmission empty) interrupt
|
||||
USART_ITConfig(self->USART_TypeDef, USART_IT_TXE, ENABLE);
|
||||
|
||||
//! Try to take Semaphore - If the USART transmission is still busy, the
|
||||
//! Semaphore cannot be taken - FREERTOS will suspend this task until the
|
||||
//! Semaphore is released again
|
||||
xSemaphoreTake(self->txSemaphore, portMAX_DELAY);
|
||||
//! Try to take Semaphore - If the USART transmission is still busy, the
|
||||
//! Semaphore cannot be taken - FREERTOS will suspend this task until the
|
||||
//! Semaphore is released again
|
||||
xSemaphoreTake(self->txSemaphore, portMAX_DELAY);
|
||||
|
||||
/** Enabling the TX interrupt will immediately cause an interrupt because
|
||||
* the transmission register is still empty. The ISR will get the data
|
||||
* from the uart transmission queue and transmit byte-wise until the
|
||||
* queue is empty.
|
||||
* An empty queue will cause the transmission complete flag (TC) to be set,
|
||||
* which is polled
|
||||
*/
|
||||
while (USART_GetFlagStatus(self->USART_TypeDef, USART_FLAG_TC) == RESET)
|
||||
{
|
||||
//! The software must wait until TC=1. The TC flag remains cleared during
|
||||
//! all data transfers and it is set by hardware at the last frame's
|
||||
//! end of transmission
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
//! Do nothing
|
||||
}
|
||||
/** Enabling the TX interrupt will immediately cause an interrupt because
|
||||
* the transmission register is still empty. The ISR will get the data
|
||||
* from the uart transmission queue and transmit byte-wise until the
|
||||
* queue is empty.
|
||||
* An empty queue will cause the transmission complete flag (TC) to be set,
|
||||
* which is polled
|
||||
*/
|
||||
while (USART_GetFlagStatus(self->USART_TypeDef, USART_FLAG_TC) == RESET)
|
||||
{
|
||||
//! The software must wait until TC=1. The TC flag remains cleared during
|
||||
//! all data transfers and it is set by hardware at the last frame's
|
||||
//! end of transmission
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
//! Do nothing
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
returnValue = ERROR;
|
||||
}
|
||||
return (returnValue); //! Return result to caller
|
||||
}
|
||||
|
||||
@@ -227,20 +227,27 @@ ErrorStatus Uart_read (struct Uart* self, char* buffer, size_t length, size_t* a
|
||||
*actualLength = 0;
|
||||
struct usartQueueItem usartRxItem;
|
||||
|
||||
|
||||
for (loopCounter = 0; loopCounter < length; loopCounter++)
|
||||
if (self->initialized)
|
||||
{
|
||||
if (xQueueReceive(self->rxQueue, &usartRxItem, 0) != pdFALSE)
|
||||
|
||||
for (loopCounter = 0; loopCounter < length; loopCounter++)
|
||||
{
|
||||
// Item successfully fetched from Queue
|
||||
buffer[loopCounter] = usartRxItem.byte;
|
||||
*actualLength = *actualLength + 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
break;
|
||||
if (xQueueReceive(self->rxQueue, &usartRxItem, 0) != pdFALSE)
|
||||
{
|
||||
// Item successfully fetched from Queue
|
||||
buffer[loopCounter] = usartRxItem.byte;
|
||||
*actualLength = *actualLength + 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
returnValue = ERROR;
|
||||
}
|
||||
|
||||
return returnValue;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user