implemented memory device, flashStorage and cached storage

git-svn-id: https://svn.vbchaos.nl/svn/hsb/trunk@268 05563f52-14a8-4384-a975-3d1654cca0fa

S - Software/0 - HSB MRTS Kathode-MCP/3 - Implementation/0 - Code/HAL/inc/CachedStorage.h

@@ -0,0 +1,123 @@
+// -----------------------------------------------------------------------------
+/// @file  CachedStorage.h
+/// @brief EEPROM driver including local caching (for one page)
+// -----------------------------------------------------------------------------
+//  Micro-Key bv
+//  Industrieweg 28, 9804 TG Noordhorn
+//  Postbus 92, 9800 AB Zuidhorn
+//  The Netherlands
+//  Tel: +31 594 503020
+//  Fax: +31 594 505825
+//  Email: support@microkey.nl
+//  Web: www.microkey.nl
+// -----------------------------------------------------------------------------
+/// $Revision$
+/// $Author$
+/// $Date$
+//  (c) 2017 Micro-Key bv
+// -----------------------------------------------------------------------------
+
+/// @defgroup {group_name} {group_description}
+/// Description
+
+/// @file adc.h
+/// @ingroup {group_name}
+
+#ifndef _CACHEDEEPROM_H_
+#define _CACHEDEEPROM_H_
+
+// -----------------------------------------------------------------------------
+// Include files
+// -----------------------------------------------------------------------------
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdio.h>
+
+#include "stm32f10x.h"
+
+#include "platform.h"
+
+// -----------------------------------------------------------------------------
+// Constant and macro definitions
+// -----------------------------------------------------------------------------
+
+
+
+// -----------------------------------------------------------------------------
+// Type definitions.
+// -----------------------------------------------------------------------------
+
+
+struct CachedStorage
+{
+   bool initialized;
+   unsigned int pageSize;
+   bool dirty;
+   unsigned int page;
+   struct MemoryDevice* memoryDevice;
+   uint8_t storage[CACHED_STORAGE_PAGESIZE];
+	uint8_t tempBuffer[CACHED_STORAGE_PAGESIZE];
+};
+
+// -----------------------------------------------------------------------------
+// Function declarations
+// -----------------------------------------------------------------------------
+
+
+/**
+* Initializes the EEPROM hardware and reads the flash page
+*/
+ErrorStatus CachedStorage_construct(struct CachedStorage* self, struct MemoryDevice* memoryDevice, unsigned int page, unsigned int pageSize);
+
+/**
+* Terminates the EEPROM hardware. SPI port is available again
+*/
+void CachedStorage_destruct(struct CachedStorage* self);
+
+/**
+* Writes one byte to the storage buffer
+*/
+void CachedStorage_writeByte(struct CachedStorage* self, int offset, uint8_t value);
+
+/**
+* Writes two bytes to the storage buffer
+*/
+void CachedStorage_writeHalfWord(struct CachedStorage* self, int offset, uint16_t value);
+
+/**
+* Writes four bytes to the storage buffer
+*/
+void CachedStorage_writeWord(struct CachedStorage* self, int offset, uint32_t value);
+
+/**
+* Writes binary data to the storage buffer
+*/
+void CachedStorage_writeBlob(struct CachedStorage* self, int offset, const void* blob, size_t blobSize);
+
+/**
+* Reads one byte from the storage buffer
+*/
+uint8_t CachedStorage_readByte(struct CachedStorage* self, int offset);
+
+/**
+* Reads two bytes from the storage buffer
+*/
+uint16_t CachedStorage_readHalfWord(struct CachedStorage* self, int offset);
+
+/**
+* Reads four bytes from the storage buffer
+*/
+uint32_t CachedStorage_readWord(struct CachedStorage* self, int offset);
+
+/**
+* Reads binary data from the storage buffer
+*/
+const void* CachedStorage_readBlob(struct CachedStorage* self, int offset);
+
+/**
+* Writes the storage buffer to EEPROM (only if the contents differ)
+*/
+void CachedStorage_commit(struct CachedStorage* self);
+
+#endif