Made changes for the bleeder functionality.


git-svn-id: https://svn.vbchaos.nl/svn/hsb/trunk@434 05563f52-14a8-4384-a975-3d1654cca0fa
This commit is contained in:
tla
2018-02-15 08:56:04 +00:00
parent 28e5b0174c
commit 34cbc18752
6 changed files with 6 additions and 46 deletions

View File

@@ -119,7 +119,7 @@ Value=No
[Parameter8]
Name=Rev
Value=PA1
Value=PA2
[Parameter9]
Name=Project_Title
@@ -786,46 +786,6 @@ OutputName9=Export IDF
OutputDocumentPath9=
OutputVariantName9=
OutputDefault9=0
OutputType10=Ansoft Neutral
OutputName10=Ansoft Neutral (AutoPCB)
OutputDocumentPath10=
OutputVariantName10=
OutputDefault10=0
OutputType11=HyperLynx
OutputName11=HyperLynx (AutoPCB)
OutputDocumentPath11=
OutputVariantName11=
OutputDefault11=0
OutputType12=Orcad SDT Schematic
OutputName12=Orcad SDT Schematic (AutoSCH)
OutputDocumentPath12=
OutputVariantName12=
OutputDefault12=0
OutputType13=Orcad v7 Capture Design
OutputName13=Orcad v7 Capture Design (AutoSCH)
OutputDocumentPath13=
OutputVariantName13=
OutputDefault13=0
OutputType14=P-CAD ASCII
OutputName14=P-CAD ASCII (AutoPCB)
OutputDocumentPath14=
OutputVariantName14=
OutputDefault14=0
OutputType15=P-CAD V16 Schematic Design
OutputName15=P-CAD V16 Schematic Design (AutoSCH)
OutputDocumentPath15=
OutputVariantName15=
OutputDefault15=0
OutputType16=Protel PCB 2.8 ASCII
OutputName16=Protel PCB 2.8 ASCII (AutoPCB)
OutputDocumentPath16=
OutputVariantName16=
OutputDefault16=0
OutputType17=SiSoft
OutputName17=SiSoft (AutoPCB)
OutputDocumentPath17=
OutputVariantName17=
OutputDefault17=0
[OutputGroup10]
Name=PostProcess Outputs