Rev PB1

Processed review comment.
Output data not updated yet.


git-svn-id: https://svn.vbchaos.nl/svn/hsb/trunk@322 05563f52-14a8-4384-a975-3d1654cca0fa

P - PCB/0 - HSB MRTS Kathode-MCP PCB/2 - Design/Simulaties/2kV MFB 100Hz LPF.log

@@ -1,5 +1,7 @@
-Circuit: * C:\Products\Photonis\0387-HSB MRTS\P - PCB\0 - HSB MRTS Kathode-MCP PCB\Design\2kV MFB 100Hz LPF.asc
+Circuit: * C:\Products\Photonis\0387-HSB MRTS\P - PCB\0 - HSB MRTS Kathode-MCP PCB\2 - Design\Simulaties\2kV MFB 100Hz LPF.asc
 
+WARNING: Less than two connections to node U3:VCC_BUF.  This node is used by E:U3:_E1.
+WARNING: Less than two connections to node U3:VEE_BUF.  This node is used by E:U3:_E2.
 Instance "m:u1:35": Length shorter than recommended for a level 1 MOSFET.
 Instance "m:u1:34": Length shorter than recommended for a level 1 MOSFET.
 Instance "m:u1:31": Length shorter than recommended for a level 1 MOSFET.
@@ -31,155 +33,43 @@ Starting Gmin stepping
 Gmin = 10
 Gmin = 1.07374
 vernier = 0.5
-Singular matrix:  Check node u2:40
+vernier = 0.25
-   Iteration No. 59
+vernier = 0.125
+vernier = 0.0625
+Gmin = 1.10559
+vernier = 0.03125
+vernier = 0.015625
+vernier = 0.0078125
+vernier = 0.00390625
+vernier = 0.00195313
+vernier = 0.000976563
+vernier = 0.000488281
 Gmin = 0
-Singular matrix:  Check nodes v:u2:33#branch and u2:40
-   Iteration No. 1
 Gmin stepping failed
 
 Starting source stepping with srcstepmethod=0
 Source Step = 3.0303%
 Source Step = 33.3333%
 Source Step = 63.6364%
-Source Step = 67.4361%
+Source Step = 93.9394%
-vernier = 0.000976563
-Source Step = 67.4538%
-Source Step = 67.4834%
-Source Step = 67.513%
-Source Step = 67.5426%
-Source Step = 67.5722%
-vernier = 0.00146484
-Source Step = 67.6122%
-Source Step = 67.6565%
-Source Step = 67.7009%
-Source Step = 67.7453%
-Source Step = 67.7897%
-vernier = 0.00219727
-Source Step = 67.8474%
-Source Step = 67.914%
-Source Step = 67.9806%
-Source Step = 68.0472%
-Source Step = 68.1138%
-vernier = 0.0032959
-Source Step = 68.197%
-Source Step = 68.2969%
-Source Step = 68.3967%
-Source Step = 68.4966%
-Source Step = 68.5965%
-vernier = 0.00494385
-Source Step = 68.7163%
-Source Step = 68.8662%
-Source Step = 69.016%
-Source Step = 69.1658%
-Source Step = 69.3156%
-vernier = 0.00741577
-Source Step = 69.4879%
-Source Step = 69.7126%
-Source Step = 69.9373%
-Source Step = 70.162%
-Source Step = 70.3868%
-vernier = 0.0111237
-Source Step = 70.634%
-Source Step = 70.971%
-Source Step = 71.3081%
-Source Step = 71.6452%
-Source Step = 71.9823%
-vernier = 0.0166855
-Source Step = 72.3362%
-Source Step = 72.8418%
-Source Step = 73.3475%
-Source Step = 73.8531%
-Source Step = 74.3587%
-Source Step = 74.8643%
-vernier = 0.0250282
-Source Step = 75.6227%
-Source Step = 76.3812%
-Source Step = 77.1396%
-Source Step = 77.898%
-Source Step = 78.6565%
-vernier = 0.0375423
-Source Step = 79.7562%
-Source Step = 80.8938%
-Source Step = 82.0315%
-Source Step = 83.1691%
-Source Step = 84.3068%
-vernier = 0.0563135
-Source Step = 85.8995%
-Source Step = 87.606%
-Source Step = 89.3124%
-Source Step = 90.171%
-Source Step = 90.1977%
-Source Step = 90.2243%
-Source Step = 90.251%
-Source Step = 90.2776%
-Source Step = 90.3043%
-vernier = 0.00131985
-Source Step = 90.339%
-Source Step = 90.379%
-Source Step = 90.419%
-Source Step = 90.459%
-Source Step = 90.499%
-vernier = 0.00197977
-Source Step = 90.549%
-Source Step = 90.6089%
-Source Step = 90.6689%
-Source Step = 90.7289%
-Source Step = 90.7889%
-vernier = 0.00296966
-Source Step = 90.8609%
-Source Step = 90.9509%
-Source Step = 91.0409%
-Source Step = 91.1309%
-Source Step = 91.2209%
-vernier = 0.00445449
-Source Step = 91.3244%
-Source Step = 91.4593%
-Source Step = 91.5943%
-Source Step = 91.7293%
-Source Step = 91.8643%
-vernier = 0.00668173
-Source Step = 92.0128%
-Source Step = 92.2153%
-Source Step = 92.4177%
-Source Step = 92.6202%
-Source Step = 92.8227%
-vernier = 0.0100226
-Source Step = 93.0353%
-Source Step = 93.339%
-Source Step = 93.6427%
-Source Step = 93.9464%
-Source Step = 94.2501%
-Source Step = 94.5539%
-vernier = 0.0150339
-Source Step = 95.0094%
-Source Step = 95.465%
-Source Step = 95.9206%
-Source Step = 96.3762%
-Source Step = 96.8317%
-vernier = 0.0225508
-Source Step = 97.4923%
-Source Step = 98.1757%
-Source Step = 98.859%
-Source Step = 99.5424%
 Source stepping succeeded in finding the operating point.
 
 
-Date: Fri May 12 16:09:09 2017
+Date: Fri Dec 01 14:15:33 2017
-Total elapsed time: 5.615 seconds.
+Total elapsed time: 0.732 seconds.
 
 tnom = 27
 temp = 27
 method = modified trap
-totiter = 202055
+totiter = 4839
-traniter = 196677
+traniter = 2927
-tranpoints = 31359
+tranpoints = 1266
-accept = 23722
+accept = 1218
-rejected = 7637
+rejected = 48
-matrix size = 201
+matrix size = 271
-fillins = 653
+fillins = 535
 solver = Normal
-Thread vector: 13.2/8.7[3] 5.9/3.3[3] 4.2/3.1[3] 1.1/1.4[1]  2592/500
+Thread vector: 20.2/10.9[4] 6.8/5.3[4] 5.8/4.4[4] 1.2/2.2[1]  2592/500
-Matrix Compiler1: 38.63 KB object code size  9.5/3.9/[1.6]
+Matrix Compiler1: 28.54 KB object code size  8.8/3.1/[1.7]
-Matrix Compiler2: 28.99 KB object code size  4.0/5.2/[1.7]
+Matrix Compiler2: 31.63 KB object code size  5.9/6.3/[1.7]
 

P - PCB/0 - HSB MRTS Kathode-MCP PCB/3 - Implementation/0 - Altium Project/MLA-0387-P0.PrjPCB

@@ -292,7 +292,7 @@ Value=Yes
 
 [Parameter8]
 Name=SCH_Rev
-Value=PB0
+Value=PB1
 
 [Parameter9]
 Name=Project_Title
@@ -304,7 +304,7 @@ Value=1.6 mm
 
 [Parameter11]
 Name=PCB_Rev
-Value=MLA-0387-P0-PB0
+Value=MLA-0387-P0-PB1
 
 [Parameter12]
 Name=PCB_Dimension
@@ -961,6 +961,46 @@ OutputName9=Specctra Design PCB
 OutputDocumentPath9=
 OutputVariantName9=
 OutputDefault9=0
+OutputType10=Ansoft Neutral
+OutputName10=Ansoft Neutral (AutoPCB)
+OutputDocumentPath10=
+OutputVariantName10=
+OutputDefault10=0
+OutputType11=HyperLynx
+OutputName11=HyperLynx (AutoPCB)
+OutputDocumentPath11=
+OutputVariantName11=
+OutputDefault11=0
+OutputType12=Orcad SDT Schematic
+OutputName12=Orcad SDT Schematic (AutoSCH)
+OutputDocumentPath12=
+OutputVariantName12=
+OutputDefault12=0
+OutputType13=Orcad v7 Capture Design
+OutputName13=Orcad v7 Capture Design (AutoSCH)
+OutputDocumentPath13=
+OutputVariantName13=
+OutputDefault13=0
+OutputType14=P-CAD ASCII
+OutputName14=P-CAD ASCII (AutoPCB)
+OutputDocumentPath14=
+OutputVariantName14=
+OutputDefault14=0
+OutputType15=P-CAD V16 Schematic Design
+OutputName15=P-CAD V16 Schematic Design (AutoSCH)
+OutputDocumentPath15=
+OutputVariantName15=
+OutputDefault15=0
+OutputType16=Protel PCB 2.8 ASCII
+OutputName16=Protel PCB 2.8 ASCII (AutoPCB)
+OutputDocumentPath16=
+OutputVariantName16=
+OutputDefault16=0
+OutputType17=SiSoft
+OutputName17=SiSoft (AutoPCB)
+OutputDocumentPath17=
+OutputVariantName17=
+OutputDefault17=0
 
 [OutputGroup10]
 Name=PostProcess Outputs